The present invention relates generally to a novel microprocessor architecture. More specifically, the invention relates to a microprocessor architecture which can be easily accessed by an optional or a peripheral device. Still more specifically, the invention relates to a microprocessor architecture which makes application of single-chip microprocessors to domestic electrical appliances easier.
Known microprocessors generally comprise a central processing unit (CPU), a random-access memory (RAM), a read-only memory (ROM), an input/output (I/0) unit, an interrupt control register, a timer and so forth. In the case of a single-chip microprocessor, the aforementioned segments are all mounted on a single substrate, such as a silicon chip. Such microprocessors also are frequently available with one or more different peripheral input/output units in order to form a complete microprocessor.
In the prior art, the microprocessor architecture is not designed to accept various peripheral input/output units. This makes it difficult to interface with different kinds of peripheral input/output units. Specifically, in order to make the chip compatible with a different set of peripheral devices, significant changes in microprocessor architecture are required since a change in the peripheral devices requires changes in the instruction set, the instruction decoder, and the arrangement of the RAM and the ROM to suit the new peripheral devices. Such changes require significant design work and take a long time. This results in rather high chip development costs.